1. SSPCON (Synchronous Serial Port Control Register)

Controls and configures the SPI engine.
Key Bits:

• SSPOV (Overflow Flag):

  • Set when new SPI data arrives before the previous SSPBUF was read.
  • Indicates overflow error – data may be lost.
  • Must be cleared by software and the SSP module reset (toggle SSPEN) before further use.

• SSPEN (Enable Bit):

  • 1 → Enables the SSP (SPI) module (must remain set during use).
  • 0 → Disables or resets the module.

• CKP (Clock Polarity):

  • Sets the idle state of the clock (CPOL).
  • 0 → Clock idles LOW
  • 1 → Clock idles HIGH

2. SSPSTAT (Synchronous Serial Port Status Register)

Provides status and configuration options for SPI transfers.
Key Bits:

• SMP (Sample Timing):

  • Slave Mode: Must remain cleared.
  • Master Mode: Selects when data is sampled:
    • 0 → Sample in the middle of output data
    • 1 → Sample at the end of output data
  • Allows compatibility with different SPI slaves.

• CKE (Clock Edge Select):

  • Determines on which edge data is transmitted/received (affects CPHA).
  • Works together with CKP to set SPI mode (0–3).

• BF (Buffer Full):

  • 1 → SSPBUF contains unread data.
  • Must read SSPBUF before new data arrives to prevent overflow.
  • Automatically cleared when SSPBUF is read.

Important Notes:

• Overflow Handling:

  • If SSPOV = 1, it means data was lost.
  • Software must:
    1. Clear SSPOV.
    2. Toggle SSPEN to reset the module.
    3. Ensure SSPOV remains cleared before continuing.

• Good Practice:

  • Always check BF before writing/reading.
  • Clear SSPOV if set, otherwise SPI data may stop updating.